Computer Engineering Course

Lesson 1 • Number Systems and Data Representation

Covers binary, octal, and hexadecimal systems and their arithmetic. Connects numeric encoding to how processors store and manipulate all data types.

Lesson 2 • History and Scope of the Discipline

Traces computing evolution from mechanical calculators to modern processors. Provides context for understanding why hardware-software co-design defines the field.

Lesson 3 • Boolean Algebra and Logic Gates

Introduces Boolean laws, truth tables, and fundamental gate types. Builds the mathematical foundation required for digital circuit design.

Lesson 1 • Circuit Simulation and Verification

Applies simulation tools to validate timing, logic correctness, and edge cases. Reinforces design quality before physical implementation.

Lesson 2 • Sequential Logic and State Machines

Covers latches, flip-flops, registers, and finite state machine modeling. Enables design of circuits whose output depends on both input and stored state.

Lesson 3 • Combinational Circuit Design

Teaches multiplexers, decoders, adders, and comparators from Boolean expressions. Connects gate-level design to reusable functional building blocks.

Lesson 1 • Memory Hierarchy and Caching

Covers SRAM, DRAM, cache organization, and virtual memory principles. Explains how hierarchy design balances speed, capacity, and cost.

Lesson 2 • Input/Output and Bus Architecture

Examines I/O interfaces, interrupt mechanisms, and bus protocols. Connects peripheral communication to processor control and system throughput.

Lesson 3 • Instruction Set Architecture Fundamentals

Defines ISA components including opcodes, addressing modes, and register files. Establishes the contract between hardware and the software stack above it.

Lesson 4 • Processor Datapath and Control

Builds a single-cycle datapath and derives control signals from instruction decoding. Connects ISA semantics to physical hardware execution paths.

Lesson 1 • Microcontroller Architecture and Selection

Compares microcontroller families by core width, peripherals, and power profiles. Guides selection decisions based on application requirements and constraints.

Lesson 2 • Low-Power Design Strategies

Examines sleep modes, clock gating, and dynamic voltage scaling for battery-powered devices. Connects power management to product lifetime and regulatory compliance.

Lesson 3 • Peripheral Interfacing Techniques

Teaches GPIO, timers, ADC, DAC, and communication bus configuration. Enables students to connect sensors and actuators to a microcontroller platform.

Lesson 4 • Real-Time Constraints and Scheduling

Introduces hard and soft real-time concepts, task scheduling, and deadline analysis. Prepares students to reason about timing correctness in safety-relevant systems.

Lesson 1 • Inter-Process Communication

Teaches pipes, message queues, shared memory, and sockets as IPC mechanisms. Enables students to design multi-process applications with correct synchronization.

Lesson 2 • Memory Management and Virtual Memory

Covers segmentation, paging, demand paging, and page replacement algorithms. Connects OS memory abstractions to the hardware MMU studied in Chapter 3.

Lesson 3 • Process and Thread Management

Covers process creation, context switching, and thread synchronization primitives. Establishes how the OS multiplexes CPU resources among concurrent tasks.

Lesson 4 • File Systems and Storage Management

Examines file system structures, journaling, and storage device interfaces. Prepares students to evaluate file system choices for embedded and server contexts.

Lesson 1 • Network Layer and Routing

Examines IP addressing, subnetting, and routing algorithm families. Enables students to configure and troubleshoot routed networks.

Lesson 2 • Transport Layer Protocols

Analyzes TCP connection management, flow control, and congestion control alongside UDP. Prepares students to select and tune transport protocols for applications.

Lesson 3 • Network Models and Physical Layer

Introduces OSI and TCP/IP models, signal encoding, and transmission media. Grounds protocol discussions in the physical constraints of real communication channels.

Lesson 4 • Data Link and MAC Protocols

Covers framing, error correction, and medium access control strategies. Connects link-layer reliability mechanisms to higher-layer protocol assumptions.

Lesson 1 • Hardware Accelerator Design

Applies pipelining, loop unrolling, and memory partitioning to accelerate compute kernels. Connects FPGA resources to measurable throughput and latency improvements.

Lesson 2 • FPGA Architecture and Resources

Examines LUTs, flip-flops, block RAM, DSP slices, and routing fabric. Connects architectural resources to the design choices made during synthesis.

Lesson 3 • Synthesis and Implementation Flow

Covers RTL synthesis, technology mapping, placement, and routing steps. Prepares students to interpret tool reports and resolve timing violations.

Lesson 4 • Timing Closure and Constraints

Teaches constraint file authoring, static timing analysis, and closure techniques. Enables students to meet timing requirements in complex multi-clock designs.

Lesson 1 • System Requirements and Architecture

Translates stakeholder needs into functional and non-functional requirements and block diagrams. Establishes the design contract that guides all subsequent integration work.

Lesson 2 • Hardware-Software Co-Design

Partitions system functions between hardware and software for optimal performance and cost. Applies co-design methodology to balance flexibility with execution speed.

Lesson 3 • Project Documentation and Presentation

Guides creation of technical reports, schematics, and design review presentations. Develops communication skills essential for professional engineering practice.

Lesson 4 • Reliability, Safety, and Standards

Introduces failure mode analysis, safety integrity levels, and relevant engineering standards. Prepares students to design systems that meet industry reliability expectations.