Transistor Course

Lesson 1 • Doping and Extrinsic Semiconductors

Introduces n-type and p-type doping through donor and acceptor impurities. Explains how controlled doping sets majority and minority carrier concentrations.

Lesson 2 • Atomic Structure and Energy Bands

Covers atomic bonding, valence electrons, and energy band theory in solids. Establishes the quantum mechanical basis needed for understanding semiconductor conductivity.

Lesson 3 • Carrier Transport Mechanisms

Analyzes drift and diffusion as the two primary carrier transport processes. Links electric field and concentration gradients to current density equations.

Lesson 4 • Intrinsic Semiconductor Properties

Examines pure semiconductor materials, thermal carrier generation, and the mass-action law. Connects intrinsic carrier concentration to temperature-dependent conductivity.

Lesson 1 • Diode I-V Characteristics

Analyzes the exponential current-voltage relationship and saturation current. Introduces non-ideal effects including series resistance and recombination current.

Lesson 2 • Forward and Reverse Bias Conditions

Explains how applied voltage modifies the depletion width and barrier height. Connects bias polarity to majority carrier injection and current flow direction.

Lesson 3 • Junction Capacitance Effects

Covers depletion capacitance and diffusion capacitance as frequency-limiting elements. Prepares students for high-frequency transistor analysis in later chapters.

Lesson 1 • BJT Biasing Techniques

Compares fixed bias, voltage divider bias, and emitter-stabilized bias circuits. Evaluates stability factor to select bias networks robust to beta variation.

Lesson 2 • Early Effect and Output Resistance

Explains base-width modulation and its impact on output conductance. Introduces the Early voltage parameter used in small-signal and SPICE models.

Lesson 3 • DC Current Gain and Terminal Equations

Derives alpha and beta current gain parameters from physical carrier transport. Links Ebers-Moll model equations to measurable terminal currents.

Lesson 4 • Operating Regions and Load Lines

Maps active, saturation, and cutoff regions onto the BJT output characteristics. Uses load line analysis to determine the DC operating point graphically.

Lesson 1 • Common-Emitter Amplifier Analysis

Analyzes voltage gain, input resistance, and output resistance of the CE stage. Identifies the CE configuration as the primary voltage-amplifying topology.

Lesson 2 • Common-Base and Common-Collector Stages

Compares CB current buffer and CC voltage follower characteristics to the CE stage. Enables topology selection based on impedance matching requirements.

Lesson 3 • Small-Signal Hybrid-Pi Model

Derives the hybrid-pi model parameters from the DC operating point. Provides the analytical tool used throughout BJT amplifier and frequency analysis.

Lesson 4 • Multistage Amplifier Design

Cascades CE, CB, and CC stages to achieve target gain and bandwidth. Addresses interstage loading and overall gain calculation using two-port methods.

Lesson 1 • MOSFET Device Scaling and Types

Surveys enhancement vs. depletion modes, NMOS vs. PMOS, and short-channel scaling trends. Prepares students for CMOS circuit analysis in the following chapter.

Lesson 2 • MOSFET Structure and Threshold Voltage

Explains MOS capacitor physics, inversion layer formation, and threshold voltage derivation. Connects oxide thickness and doping to threshold voltage in enhancement MOSFETs.

Lesson 3 • JFET Structure and Pinch-Off

Describes the JFET channel, gate-controlled depletion, and pinch-off voltage. Establishes the voltage-controlled current source concept central to all FET devices.

Lesson 4 • MOSFET Drain Current Equations

Derives triode and saturation region drain current expressions from charge-sheet model. Enables quantitative DC analysis of NMOS and PMOS circuits.

Lesson 1 • High-Frequency FET Amplifier Analysis

Applies Miller approximation and open-circuit time constants to FET frequency response. Determines unity-gain frequency fT and bandwidth for CS and CG stages.

Lesson 2 • CMOS Inverter and Logic Stages

Analyzes the CMOS inverter as a complementary amplifier and digital switch. Connects analog small-signal behavior to digital switching thresholds and noise margins.

Lesson 3 • FET Small-Signal Equivalent Circuit

Derives gm, rds, and Cgs/Cgd from the MOSFET operating point. Provides the model used for all FET amplifier and frequency response calculations.

Lesson 4 • Common-Source Amplifier

Analyzes voltage gain, input resistance, and output resistance of the CS stage. Compares CS performance to the BJT CE stage for topology selection.

Lesson 1 • Transistor Switching Circuits

Models BJT and MOSFET as digital switches in saturation and cutoff. Analyzes switching times, charge storage delay, and drive circuit requirements.

Lesson 2 • Power Amplifier Classes Overview

Defines conduction angle and efficiency for Classes A, B, AB, and C. Establishes the efficiency-linearity tradeoff that drives power amplifier topology selection.

Lesson 3 • Thermal Management and Safe Operating Area

Calculates junction temperature rise, thermal resistance, and heat sink requirements. Introduces the safe operating area boundary to prevent transistor failure.

Lesson 4 • Class D and Switching Power Stages

Introduces pulse-width modulation and Class D efficiency advantages over linear stages. Covers dead-time control and output filter design for switching amplifiers.

Lesson 1 • Feedback in Transistor Amplifiers

Applies four feedback topologies to transistor circuits to control gain and impedance. Analyzes stability using loop gain and phase margin criteria.

Lesson 2 • Differential Pair Analysis

Derives differential and common-mode gain, CMRR, and tail current source effects. Establishes the differential pair as the core input stage of operational amplifiers.

Lesson 3 • Operational Amplifier Internal Structure

Traces signal path through differential input, gain, and output stages of a two-stage op-amp. Connects transistor-level design to op-amp specifications such as slew rate and GBW.

Lesson 4 • Noise in Transistor Circuits

Identifies thermal, shot, and flicker noise sources in BJTs and MOSFETs. Calculates noise figure and input-referred noise for low-noise amplifier design.

Lesson 5 • Current Mirrors and Biasing Circuits

Analyzes basic, cascode, and Wilson current mirrors for precision IC biasing. Evaluates output resistance and current accuracy as design metrics.