Embedded Testing Course

Lesson 1 • Why Embedded Testing Is Unique

Contrasts embedded testing with desktop/web testing by examining resource limits, hardware dependencies, and safety criticality. Motivates the specialized techniques ahead.

Lesson 2 • Embedded Software Development Lifecycle

Maps testing activities to each phase of the embedded development lifecycle. Shows how early test planning reduces defect cost.

Lesson 3 • Anatomy of an Embedded System

Defines hardware-software boundaries, microcontrollers, peripherals, and real-time constraints. Establishes vocabulary used throughout the course.

Lesson 1 • Selecting Test Levels and Types

Matches unit, integration, system, and acceptance testing to embedded project phases. Guides resource allocation across test levels.

Lesson 2 • Defining Test Scope and Objectives

Establishes what is in and out of scope using requirements traceability. Prevents scope creep and aligns stakeholder expectations.

Lesson 3 • Risk-Based Test Prioritization

Applies risk analysis to rank test effort by failure likelihood and impact. Directly shapes scope decisions in the test plan.

Lesson 4 • Entry, Exit, and Suspension Criteria

Defines measurable conditions for starting, pausing, and completing test phases. Prevents premature sign-off and wasted test cycles.

Lesson 1 • Measuring Unit Test Coverage

Defines statement, branch, and MC/DC coverage and explains how to collect metrics from embedded builds. Connects coverage data to test completeness decisions.

Lesson 2 • Unit Test Frameworks for Embedded C

Surveys lightweight test frameworks suited to resource-constrained targets and host builds. Students configure and run a framework on a sample project.

Lesson 3 • Test Doubles: Stubs, Mocks, and Fakes

Explains how to replace hardware dependencies with controllable substitutes. Covers when to use each double type in embedded unit tests.

Lesson 4 • Test-Driven Development in Firmware

Applies the red-green-refactor cycle to firmware module development. Demonstrates how TDD improves design and reduces integration defects.

Lesson 1 • Testing Peripheral Interfaces

Covers test techniques for UART, SPI, I2C, and GPIO interfaces at the integration level. Teaches signal verification and protocol conformance checking.

Lesson 2 • Interrupt and Event-Driven Testing

Addresses the challenge of testing asynchronous interrupt-driven behavior in firmware. Introduces techniques for triggering and verifying interrupt service routines.

Lesson 3 • Integration Defect Classification

Categorizes integration failures by root cause: timing, protocol, configuration, or logic errors. Speeds diagnosis and guides targeted fixes.

Lesson 4 • Using Debug and Trace Interfaces

Leverages JTAG, SWD, and trace ports to observe internal state during integration tests. Reduces reliance on printf-style debugging.

Lesson 1 • Timing Regression and Continuous Monitoring

Establishes timing baselines and detects regressions introduced by code changes. Integrates timing checks into automated build pipelines.

Lesson 2 • Timing Measurement Techniques

Covers GPIO toggling, hardware timers, logic analyzers, and oscilloscopes for timing measurement. Teaches how to instrument code without distorting measured results.

Lesson 3 • Worst-Case Execution Time Analysis

Introduces static and dynamic WCET analysis methods to bound task execution time. Connects WCET results to schedulability verification.

Lesson 4 • Real-Time Concepts for Testers

Defines tasks, deadlines, jitter, latency, and schedulability from a test perspective. Provides the vocabulary needed to specify and verify timing requirements.

Lesson 1 • End-to-End Scenario Testing

Designs use-case-based scenarios that exercise complete system workflows from sensor input to actuator output. Validates system behavior against user and stakeholder requirements.

Lesson 2 • Black-Box Test Design Techniques

Applies equivalence partitioning, boundary value analysis, and decision tables to embedded system inputs. Produces systematic test cases without knowledge of internal code.

Lesson 3 • Defect Reporting and Triage at System Level

Establishes a structured defect lifecycle for system-level failures including reproduction steps and severity classification. Connects defect data to release decisions.

Lesson 4 • Hardware-in-the-Loop Testing

Introduces HIL test benches that replace physical plant components with real-time simulation. Enables repeatable system-level testing of control and safety functions.

Lesson 1 • Automated Test Execution on Target

Implements test execution loops that send stimuli, capture responses, and compare against expected values. Covers serial, USB, and network communication channels.

Lesson 2 • Automation Architecture for Embedded

Defines the layers of an embedded test automation framework: test runner, target interface, and reporting. Guides architectural decisions before implementation begins.

Lesson 3 • Automating Target Flashing and Reset

Scripts firmware flashing, hardware reset, and boot verification as automation prerequisites. Ensures a known device state before every automated test run.

Lesson 4 • Test Result Reporting and Dashboards

Generates structured test reports and live dashboards from automated run data. Enables stakeholders to track quality trends without manual data collection.

Lesson 1 • Functional Safety Concepts for Testers

Introduces safety integrity levels, hazard analysis, and safety goals from a test perspective. Establishes the regulatory context that drives safety test requirements.

Lesson 2 • Coverage Requirements for Safety Standards

Maps MC/DC, modified condition coverage, and structural coverage requirements to safety integrity levels. Guides coverage target setting for safety-critical modules.

Lesson 3 • Regression Testing for Safety Releases

Defines impact analysis and regression scope for safety-critical change management. Ensures that safety properties are preserved across every software update.

Lesson 4 • Fault Injection Testing

Injects hardware and software faults to verify that safety mechanisms detect and handle failures correctly. Validates diagnostic coverage claims in the safety case.