Ladder Logic Programming Course

Lesson 1 • PLC Hardware Architecture

Examines CPU, power supply, I/O modules, and backplane components. Connects physical hardware understanding to software programming concepts introduced later.

Lesson 2 • Industrial Automation Fundamentals

Covers the evolution from relay-based to PLC-based control and key automation concepts. Establishes context for understanding why ladder logic was developed.

Lesson 3 • I/O Wiring and Field Devices

Covers sourcing and sinking wiring configurations and common field device types. Proper wiring knowledge prevents hardware damage and incorrect signal interpretation.

Lesson 4 • PLC Operating Cycle and Scan

Explains the read-execute-write scan cycle that governs PLC operation. Understanding scan order is essential for writing predictable ladder logic programmes.

Lesson 1 • Output Coil and Latch Instructions

Covers OTE, OTL, and OTU instructions for controlling output bits. Latch and unlatch pairs enable memory retention across scan cycles.

Lesson 2 • Addressing and Tag-Based Programming

Compares file-based numeric addressing with modern tag-based addressing systems. Proper tag naming improves programme readability and long-term maintainability.

Lesson 3 • Examine On and Examine Off Instructions

Teaches XIC and XIO contact instructions and their relationship to bit states. Students practise reading bit status and predicting rung continuity outcomes.

Lesson 4 • Ladder Diagram Language Concepts

Explains rungs, rails, contacts, and coils as the building blocks of ladder logic. Connects the visual metaphor to relay schematic diagrams for intuitive understanding.

Lesson 1 • Designing Timer-Based Control Sequences

Applies timer instructions to create timed start delays, alarm delays, and pulse outputs. Students chain multiple timers to produce complex sequential timing behaviour.

Lesson 2 • Combining Timers and Counters

Integrates timer and counter instructions to solve multi-variable control problems. Students build a timed cycle counter programme as a capstone for this chapter.

Lesson 3 • Practical Counter Applications

Implements part counting, batch control, and production tracking using counter instructions. Students combine counters with outputs to trigger actions at defined counts.

Lesson 4 • Counter Instruction Types and Parameters

Covers CTU, CTD, and RES instructions for counting events up and down. Counter status bits enable conditional logic based on accumulated count values.

Lesson 1 • Compute and Advanced Maths Instructions

Uses the CPT compute instruction to write multi-operation expressions in a single rung. Advanced functions include SQR, ABS, and trigonometric operations.

Lesson 2 • Arithmetic Instructions

Introduces ADD, SUB, MUL, DIV, and MOD instructions for mathematical calculations. Students apply arithmetic to scale sensor values and compute setpoints.

Lesson 3 • Comparison Instructions

Teaches EQU, NEQ, LES, GRT, LEQ, GEQ instructions for evaluating numeric conditions. Comparison results drive output logic based on real-time process data.

Lesson 4 • Scaling and Engineering Unit Conversion

Applies SCL and linear scaling formulas to convert raw analogue counts to engineering units. Accurate scaling is critical for process control and alarm setpoint logic.

Lesson 1 • Jump and Label Instructions

Covers JMP and LBL instructions for conditional programme flow redirection within a routine. Proper use reduces unnecessary scan time but requires careful logic design.

Lesson 2 • Modular Programme File Organisation

Structures programmes into main, equipment, and utility routines for clarity and scalability. A well-organised file structure reduces troubleshooting time significantly.

Lesson 3 • Master Control Reset and Zone Control

Explains MCR and ZCL instructions for enabling and disabling groups of rungs. Zone control simplifies safety interlocking and machine mode management.

Lesson 4 • Fault Handling and Programme Diagnostics

Introduces fault routines, fault codes, and recovery logic for robust programme design. Students configure fault handlers that log errors and attempt safe recovery.

Lesson 1 • LIFO Stack Instructions

Covers LFL and LFU instructions for last-in, first-out data stack management. LIFO stacks suit applications requiring reverse-order data retrieval and undo operations.

Lesson 2 • Bit Shift and FIFO Instructions

Introduces BSL, BSR, FFL, and FFU instructions for shifting data through arrays. These instructions support conveyor tracking, queue management, and data logging.

Lesson 3 • Sequencer Compare and Load Instructions

Teaches SQC for comparing input states to a reference table and SQL for loading data. These instructions enable feedback-verified sequencing and dynamic table updates.

Lesson 4 • Designing a Multi-Step Machine Sequence

Integrates sequencer and shift instructions into a complete multi-step machine programme. Students document state transitions and validate each step against design specifications.

Lesson 1 • PID Instruction Structure and Parameters

Explains the PID instruction data file, control variable, setpoint, and output parameters. Understanding each parameter is prerequisite to effective loop tuning.

Lesson 2 • Alarm and Safety Integration with PID

Adds high, low, and deviation alarms to PID loops and integrates safety shutdowns. Students programme alarm hysteresis to prevent nuisance trips during normal operation.

Lesson 3 • Cascade and Feedforward Control

Introduces cascade PID configuration and feedforward compensation for disturbance rejection. These advanced strategies improve control performance in complex processes.

Lesson 4 • Analogue Module Configuration

Covers channel configuration, signal range selection, and filter settings for analogue modules. Correct module setup ensures accurate process variable readings in the programme.

Lesson 1 • Safety Relay and Safety PLC Concepts

Introduces safety integrity levels, safety relays, and safety-rated PLC platforms. Students understand how safety logic differs from standard control logic in design and validation.

Lesson 2 • Programme Verification and Factory Acceptance Testing

Covers FAT procedures, test case development, and structured sign-off documentation. Systematic verification ensures the programme meets all functional and safety requirements.

Lesson 3 • Emergency Stop and Safety Circuit Programming

Programmes E-stop circuits, safety gate monitoring, and light curtain integration in ladder logic. Correct safety circuit design prevents hazardous energy release during faults.

Lesson 4 • Site Acceptance Testing and Commissioning

Guides students through SAT execution, startup checklists, and live process validation. Commissioning skills bridge the gap between lab programming and production deployment.