Microcontroller Course

Lesson 1 • Memory Organisation and Addressing

Covers flash, SRAM, EEPROM, and register file layout. Students map memory regions and understand how addressing affects code and data placement.

Lesson 2 • What Is a Microcontroller

Defines microcontrollers and contrasts them with microprocessors and FPGAs. Provides the conceptual baseline for all subsequent hardware and software topics.

Lesson 3 • Power Supply and Reset Circuits

Explains voltage regulation, decoupling capacitors, and reset signal requirements. Proper power design prevents erratic behaviour covered in later debugging chapters.

Lesson 4 • Development Ecosystem Introduction

Surveys IDEs, compilers, programmers, and debuggers used throughout the course. Students set up a working toolchain before writing their first programme.

Lesson 1 • Configuring Input Pins

Addresses floating inputs, pull-up and pull-down resistors, and Schmitt trigger inputs. Proper input configuration prevents noise-induced false readings.

Lesson 2 • Switch Debouncing Techniques

Teaches hardware and software methods to eliminate mechanical switch bounce. Reliable debouncing is essential before implementing interrupt-driven input.

Lesson 3 • Configuring Output Pins

Covers push-pull and open-drain output modes, drive strength, and slew rate. Students configure pins to drive LEDs, relays, and logic signals correctly.

Lesson 4 • LED and Indicator Drive Circuits

Covers current-limiting resistor calculation, multiplexed LED arrays, and charlieplexing. Students build practical indicator circuits used in later project chapters.

Lesson 1 • Interrupt Latency and Priority Management

Analyses sources of interrupt latency and strategies to meet real-time deadlines. Priority assignment decisions directly affect system responsiveness.

Lesson 2 • External Interrupt Configuration

Configures edge- and level-triggered external interrupts on GPIO pins. Students replace polling loops with efficient interrupt-driven input handling.

Lesson 3 • Software Flags and Deferred Processing

Introduces flag-based main-loop processing to offload work from ISRs. This pattern scales into the RTOS task model introduced in later chapters.

Lesson 4 • Interrupt System Architecture

Explains interrupt vectors, the interrupt controller, and priority levels. This architecture underpins every event-driven technique taught in the chapter.

Lesson 1 • Watchdog Timer Configuration

Configures the watchdog timer to reset the system on firmware lockup. Watchdog integration is a mandatory reliability practice for deployed embedded systems.

Lesson 2 • PWM Signal Generation

Configures fast and phase-correct PWM modes to control duty cycle and frequency. PWM output drives motors, dimmers, and audio signals in project chapters.

Lesson 3 • Generating Accurate Time Delays

Implements blocking and non-blocking delays using timer overflow and compare-match events. Non-blocking delays replace busy-wait loops in responsive firmware.

Lesson 4 • Timer Hardware Architecture

Describes prescalers, counter registers, and compare/capture units inside a timer peripheral. Architectural understanding enables correct timer mode selection.

Lesson 1 • UART Asynchronous Communication

Configures baud rate, frame format, and flow control for UART transmission. UART is the simplest serial protocol and the foundation for protocol comparison.

Lesson 2 • SPI Synchronous Protocol

Explains SPI master and slave roles, clock polarity, and phase modes. Students interface SPI flash memory and display modules used in project chapters.

Lesson 3 • I2C Two-Wire Protocol

Covers I2C start/stop conditions, addressing, and ACK/NACK handling. Multi-device bus management skills apply directly to sensor hub designs.

Lesson 4 • Circular Buffers for Serial Data

Implements ring buffers to decouple ISR data reception from main-loop processing. Buffer design prevents data loss at high baud rates and bus speeds.

Lesson 1 • Noise Reduction and Averaging

Applies oversampling, decimation, and moving-average filters to reduce ADC noise. These techniques improve measurement resolution beyond hardware limits.

Lesson 2 • ADC Architecture and Configuration

Explains successive-approximation ADC operation, reference voltage, and resolution. Correct configuration is prerequisite to accurate sensor data acquisition.

Lesson 3 • DAC Output and Waveform Generation

Configures the DAC peripheral to produce DC reference voltages and arbitrary waveforms. DAC output drives actuators and audio circuits in project work.

Lesson 4 • ADC Sampling Modes and Triggering

Configures single, continuous, and scan modes with timer and software triggers. Triggered sampling synchronises data acquisition with system events.

Lesson 1 • Real-Time Clock and Scheduled Wake-Up

Uses the RTC peripheral to schedule periodic wake events from deep sleep. RTC-based scheduling enables duty-cycled sensor nodes with long battery life.

Lesson 2 • Peripheral Clock Gating

Disables unused peripheral clocks via clock control registers to reduce dynamic power. Clock gating complements sleep modes for fine-grained power management.

Lesson 3 • Voltage Scaling and Frequency Reduction

Reduces core voltage and CPU frequency at runtime to lower dynamic power dissipation. Students implement dynamic voltage and frequency scaling in firmware.

Lesson 4 • Power Consumption Analysis

Measures active, idle, and sleep current using datasheets and bench instruments. Accurate power budgeting is the foundation of low-power system design.

Lesson 1 • Inter-Task Communication Mechanisms

Uses queues, semaphores, and mutexes to share data and synchronise tasks safely. These primitives prevent race conditions identified in the interrupts chapter.

Lesson 2 • State Machine Design Patterns

Implements finite state machines to manage complex control flow without blocking. FSM patterns replace nested conditionals in interrupt-driven and RTOS contexts.

Lesson 3 • RTOS Concepts and Task Management

Introduces RTOS scheduler, tasks, priorities, and context switching. Task-based design enables concurrent peripheral management in complex applications.

Lesson 4 • Layered Firmware Architecture

Organises code into hardware abstraction, driver, middleware, and application layers. Layering reduces coupling and simplifies testing and porting across platforms.