Semiconductor Course

Lesson 1 • Atomic Structure and Bonding

Covers electron configuration, covalent bonding, and crystal lattice formation in semiconductors. Establishes the atomic basis for all subsequent electrical behavior.

Lesson 2 • Carrier Transport Mechanisms

Covers drift and diffusion as the two primary carrier transport processes. Connects electric field and concentration gradients to current flow in semiconductors.

Lesson 3 • Intrinsic Semiconductor Properties

Analyzes pure semiconductor behavior, intrinsic carrier concentration, and thermal generation of electron-hole pairs. Provides the baseline for understanding doped materials.

Lesson 1 • Donor and Acceptor Impurities

Introduces n-type and p-type doping using Group V and Group III elements. Explains ionization energy and how dopants shift the Fermi level.

Lesson 2 • Mobility and Resistivity in Doped Materials

Examines how impurity scattering reduces carrier mobility and increases resistivity. Connects doping concentration to measurable electrical parameters.

Lesson 3 • Diffusion and Ion Implantation Profiles

Describes how dopants are introduced and distributed in semiconductor wafers via diffusion and ion implantation. Prepares students for process integration topics.

Lesson 1 • Junction Formation and Built-in Potential

Explains how diffusion and drift establish equilibrium at a p-n junction. Derives built-in potential from doping concentrations and Fermi level alignment.

Lesson 2 • Non-Ideal Diode Effects

Examines generation-recombination current, series resistance, and high-injection effects that cause deviation from ideal behavior. Prepares students for real device characterization.

Lesson 3 • Junction Capacitance and Breakdown

Covers depletion and diffusion capacitance models and avalanche and Zener breakdown mechanisms. Links junction parameters to high-frequency and protection circuit design.

Lesson 4 • Forward and Reverse Bias Behavior

Analyzes minority carrier injection under forward bias and depletion widening under reverse bias. Derives the ideal diode equation from minority carrier diffusion.

Lesson 1 • Thermal Oxidation

Analyzes dry and wet oxidation kinetics using the Deal-Grove model and oxide quality factors. Connects oxidation parameters to gate dielectric and isolation oxide properties.

Lesson 2 • Crystal Growth and Wafer Preparation

Covers Czochralski and float-zone crystal growth, wafer slicing, and surface preparation. Establishes starting material quality requirements for device fabrication.

Lesson 3 • Thin Film Deposition Techniques

Covers CVD, PVD, and ALD methods for depositing dielectrics, metals, and polysilicon. Links deposition parameters to film conformality, stress, and composition.

Lesson 4 • CMOS Process Integration

Sequences the complete CMOS fabrication flow from well formation to metallization. Demonstrates how unit processes combine to form functional transistors.

Lesson 1 • DC Biasing and Load Line Analysis

Applies Kirchhoff's laws to establish stable DC operating points for BJT amplifiers. Covers fixed-bias, voltage-divider, and emitter-stabilized configurations.

Lesson 2 • Current Gain and Transport Mechanisms

Derives common-emitter current gain from minority carrier transport across the base. Identifies factors limiting gain including base width and recombination.

Lesson 3 • Small-Signal Models and Amplifiers

Introduces the hybrid-pi and T-models for small-signal analysis of BJT amplifier stages. Computes voltage gain, input impedance, and output impedance.

Lesson 4 • BJT Structure and Operating Regions

Describes npn and pnp transistor geometry and defines active, saturation, and cutoff regions. Establishes the physical basis for transistor switching and amplification.

Lesson 1 • MOSFET I-V Characteristics

Derives drain current equations for linear and saturation regions of n-channel and p-channel MOSFETs. Connects charge-control model to measurable device output curves.

Lesson 2 • Threshold Voltage Derivation

Derives threshold voltage from oxide charge, work function difference, and depletion charge. Enables quantitative design of MOSFET switching characteristics.

Lesson 3 • MOS Capacitor Physics

Examines accumulation, depletion, and inversion in MOS structures under applied gate bias. Establishes the charge-control model underlying all MOSFET analysis.

Lesson 4 • MOSFET Small-Signal Model and Amplifiers

Develops the small-signal equivalent circuit and applies it to common-source, common-gate, and source-follower amplifier topologies. Computes gain and impedance for each configuration.

Lesson 1 • Electrical Characterization Methods

Covers I-V, C-V, and impedance measurements for diodes, MOSFETs, and BJTs. Establishes the link between measured curves and underlying device physics.

Lesson 2 • Physical and Chemical Analysis

Introduces SEM, TEM, XRD, and SIMS for structural and compositional analysis of semiconductor devices. Connects physical measurements to process and device performance.

Lesson 3 • Noise Characterization

Covers thermal, shot, and flicker noise sources in semiconductor devices and their measurement. Links noise parameters to circuit performance in analog and RF applications.

Lesson 1 • Emerging Beyond-CMOS Devices

Surveys tunnel FETs, negative capacitance FETs, and 2D material transistors as candidates to extend scaling. Evaluates their operating principles and current maturity.

Lesson 2 • CMOS Scaling Principles

Applies constant-field and generalized scaling rules to predict performance, power, and density trends. Identifies physical limits that motivate new device architectures.

Lesson 3 • High-k Dielectrics and Metal Gates

Explains why high-k gate dielectrics replace SiO2 and how metal gates eliminate polysilicon depletion. Covers material selection, interface quality, and integration challenges.

Lesson 4 • Silicon-on-Insulator Technology

Covers fully depleted and partially depleted SOI device physics and their advantages for low-power operation. Addresses floating body effects and history dependence.